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Version 3.60, Build I released on 2008-Oct 9
of ASH WARE's TPU/CPU32 System Simulator is now available!
- Thread window for determination of worst case thread length
- Channel nodes observable in logic analyzer window
- Thread Activity observable in logic analyzer window
Simulate and debug both your custom TPU microcode as well
as your host-side driver code in a single easy-to-use development
environment. This is the next-generation product to our industry-standard
TPU Stand-Alone Simulator used by virtually every European and American
automobile, truck, and heavy equipment manufacturer to develop their
engine control (EFI) software. This product has also been popular
in the aerospace, medical, and industrial control industries.
The TPU/CPU32 System Simulator, based on ASH WARE's unique
and propriety Multiple-Target Development Tool (MtDt) technology,
provides a common framework for each of the currently available TPUs
(TPU1, TPU2, and TPU3) for the MPC5xx, 683xx, and HC16 microcontroller
lines. Our software keeps all simulation targets synchronized, allowing
you to concentrate on the development tasks at hand. Our easy-to-use
IDE provides an easy migration from simulation to target hardware.
Any target can be made the primary target with the click of a mouse.
It is possible, for example, to run to a CPU breakpoint, then switch
to a TPU and single-step your TPU microcode. Standard debugging techniques--including
single-stepping, setting breakpoints, and stepping into functions--are
available for each target. With its easy-to-use interface and automatic
synchronization, the TPU/CPU32 System Simulator is one toolset that
will mitigate, rather than enhance, the complexity of your task.
Standard Features
- Automation, launch from command shell specifying project
and script files. A single pass/fail exit code. Run multiple tests
by launching multiple times from a batch file, no user intervention
is required!
- Logic Analyzer Window, including precise event timing measurement.
- Superior tracing, including pin transitions, parameter
RAM I/O, and capture/match events saved to the trace buffer.
- Stream trace data to a file, ideal for post processing.
Two file formats are provided, one for viewing and the other for
parsing.
- Source-level debugging.
- Multiple workshops, which reduce window clutter.
- Powerful C-like script command language.
- Watch and local variable windows, which allow you to view
and modify local and global variables.
- Call stack window, which allows you to identify stacked
function. Used in conjunction with the local variable window, the
call stack window allows you to view the values of stacked variables.
Also, it automatically finds source code line of stacked functions.
- Direct register modification, which allows registers and
settings to be edited within the IDE's windows.
- Powerful execution control including goto cursor (instruction
or script command), breakpoints, single step (instruction or script
command), step in, step over, step out, step atomic, goto time,
goto delta time, etc.
- Support for industry-standard file formats such as common
object file format (COFF), ELF/DWARF, Freescale SRECORD, and Intel
IHEX.
- Support for automated verification.
- External logic simulation for the TPU. Helps to model the
external system by instantiation of Boolean logic external to the
TPUs. Thus inputs can be driven by combinatorial logic applied to
outputs. This can be particularly helpful in the modelling of communications
channels such as CAN or RS485 where an output channel can be wrapped
around to drive an input channel.
- Editable memory and register windows.
- Integrated timers to aid performance analysis.
- Advanced simulated memory model.
- Trace buffers, allowing you to find source code line of
traced instruction.
- Code coverage analysis (TPU only).
- The ability to instantiate an arbitrary number of each target
simultaneously.
- The ability to assign each target to a specific workshop
so that the active target can be changed by a button click.
- The ability for multiple targets (simulated, real, or both)
to share memory.
- Independent and arbitrary frequency control for each target.
- The ability to instantiate CPU simulation engines to act as dedicated
scripting engines. (Bring all the power of a high-level language
to scripting!)
- The ability to instantiate CPU simulation engines to act as dedicated
engine models, allowing you to arbitrarily set the modelling
CPU's frequency to support any required model bandwidth.
- User-friendly interface, which runs under Windows XP, 2000,
NT 4.0, 98, 95, ME.
- Complete user manual and context-sensitive, on-line
help.
- Software upgrades over the Web.
Additional Information
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