Course Title: Using and Programming the MC33816 Programmable Solenoid Controller
Course Description: This instructor led training is organized as a series of topics that cover architecting a complete solution using the MC33816, developing and debugging MC33816 code using the assembler and simulator, locking in quality by developing an automated test suite, and moving to hardware. This is a lab-intensive training and students should bring a laptop to do the labs.
Disclaimer. This course is currently under development and is a collaboration between AMT Publishing and ASH WARE. The syllabus listed below is preliminary and subject to change.
After completing the course, participants will be prepared to design and program MC33816-based solutions.
Training Schedule - TBA - contact us!
- Introduction, Installation, and Tools. This section provides an overview of the MC33816 and a primer on the Assembler, Simulator, and Graphical State Machine Development Tool. Also provided are step-by-step installation instructions for all tools. The lab is to modify a piece of code, build it using the assembler, and then run it on the simulator.
- The SPI Interface, Clocks, and Timers. This section covers the Host MCU interface to the MC33816 via the SPI bus and use of the SPI bus by the MC33816 cores in a special 'loopback mode to access the full set of global registers. The MC33816 has an input pin used to provide a 24 MHZ system clock. An internal (but less accurate) oscillator monitors the system clock and can automatically takeover as the system clock under various error conditions. Recovery (switch back to the external clock source) is possible following fault detection. Internal timers provide the ability to measure and generate precise waveforms. The lab is to change the timer period using SPI Loopback.
- The Instruction Set. This section covers aspects of the instruction set not covered elsewhere. These include memory access (loads/stroes) program flow (jump/call/return), multiplication, bitwise operations, ALU flags, etc. The lab is to port Linux to the MC33816 (just joking). The lab is to code a subroutine that highlights various key features of the instruction set.
- Inter Core and Core/Host-MCU Coordination. There are a number of featues that provide quick and effecient mechamisms for cooperation between cores and between the Host MCU and the cores. These include 'start pins', the control and status registers, the flags (also used for reading input pins and controlling output pins) and the rxtx register.
- The Current Sense Blocks. The four current sense blocks are the heart and soul of the MC33816. Each of the four cores (generally) controls and responds to events from one current sense blocks. Each current sense block establishes a current threshold and when the current threshold is reached the core responds by switching on or off output drivers as appropriate, thereby providing a quick and powerful hysteretic current control mechanmism. The lab is to reconfigure a current control to control current sense block 4 from the first core, using both 4H and 4L under core-software control.
- Output Drivers Part 1. The output drivers are highly configurable and provide a wide range of possible applications for the MC33816. Due to their complexity, this is broken into two parts. Part 1 covers shortcuts, freewheeling mode, special aspects of LS7, core access control, slew rate control, supply considerations (Battery versus Boost), bias control (needed for diagnostics), banking, and static diagnostics. The lab is to extend existing code that detects several faults to also isolate the fault and provide a fault-specific error code in data memory.
- Interrupts. Interrupts are highly configurable in that a large number of interrupt-causing situations can be individually enabled/disabled and directed to the four cores and/or to the Host MCU. A core's ISR has a large number of available options including returning to the interrupting location under software control, automatic return to the interrupting location when the fault resolves ('beam me up Scotty') or returning through back through the power-on-reset entry point. The various options and tradeoffs are covered. The lab is to reconfigure an error handler to take advantage of some of the advanced interrupt handler options available within the MC33816.
- Output Drivers Part 2. This is the second part of the 'Output Drivers' coverage (part 1 is in Day 2.) This section covers fault trees, diagnostic interrupts, error tables, bootstrap capacitor startup considerations, and high side/low side coupling. The lab is to design and debug code that quickly responds to two different 'Shorted' scenarious thereby preventing cascading damage to the power electronics. The lab is to fill in the error table for fault conditions and measure the 'fault' to 'fault response' time in the simulation.
- State Machine Programming, Threads, and the 'Wait' Instruction. The MC33816 is an event-response machine and as such is ideally programmed within a state machine framework. 'Wait' instructions provide an event/response mechanism in that up to 5 events can be programmed into the wait table and execution resumes at a program-specified thread start address for whichever of the (up to) 5 events occured first. Use of the State Machine Graphical Development Tool is covered. The lab is to extend an existing state machine to include a 'BOOST_DECAY' state.
- Automated Regression Testing. In a modern software design's lifecycle it is imperative that requirements continue to be met over a products multi-year and often multi-decade life-cycle. Development of an automated regression test suite is the industry-standard means of doing so. The lab is to modify functional code and a 'passing' test suite so as to meet the new requirement while at the same time guaranteeing (through the test suite) that the initial requirement is still met.
- Direct Injection and DC to DC Converter Walkthrough. These off-the-shelf standard Freescale functions are examined in detail.
- Moving to Hardware. The steps required to initialize and control the MC33816 by a Host MCU across the SPI bus are covered. The lab is to run code on a development board.