Course Title: MPC5744P (Panther) Power Architecture
Target Applications: Automotive, Radar for Advanced Driver Assistance Systems, Aerospace and Safety Critical Applications.
Course Description: This 3 day course offers coverage of e200z4 Dual-Core Power Architecture, Core Memory Protection Unit, System Protection Unit (SMPU), Instruction and Data Caches, Crossbar switch and all Internal Buses, Redundancy Checker (CR), Fault Collection & Control Unit (FCCU), Clock Generation, Power Modes and Power Management Unit.
It covers two cores running in a delayed lock-step mode with emphasis on safety-critical features to meet Automotive Safety Integrity Level (ASIL-26262) standards.
The course provides lengthy discussion and coverage of the motor control peripheral set with emphasis on the FlexPWM, Cross Trigger Unit (CTU) and the Analogue-to Digital Converter (ADC) and how they interact with each other. It includes coverage of the Serial I/O Modules such as LINFlex, FlexCAN and DSPI interfaces, Enhanced Direct Memory Controller (eDMA) running in the delayed lock-step using the same methodology as the PPC processor cores.
The course will have hands-on lab examples using the MPC5744P Evaluation Boards (EVBs).
Who Should Attend: Software and system engineers who need to come up to speed quickly on how to program and design with the MPC5744P Device.
Participants will be provided: A hard copy of the workshop course notes and lab book. A CDROM of all the lab experiments and demo version of the development tools is also provided.
Prerequisite: Knowledge/experience of some microprocessor/microcontroller is necessary.
After completing the workshop, the participant will understand the basic concepts of the Dual Core Power Architecture and all major functional blocks of the Panther (MPC5744P) device.
MPC5744P Dual Core
System Clock Generation and Initialization
Motor Control Peripheral Set
Course Fees: USD$1500.00 per participant; Onsite fees to be negotiated with customers