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MPC560xB (Bolero)

Target Applications

Automotive, commercial, industrial, and aerospace

Course Description

This 3 day course offers coverage of e200z0 Power Architecture core execution units, programmer’s model, instruction set and variable-length encoding. System exceptions and Interrupt handling is fully covered. Memory protection and memory controller, cross-bar switch, power management, reset sources, boot-assist module and device modes are covered.

Also included are details of all on-chip peripherals, such as the enhanced MIOS200, ADC, system timers, FlexCAN, DSPI and SCI-LINFlex buses including the memory system and the error correction code (ECC).

With hands-on provided and development tools, the participant will be able to program on-chip peripherals and be able to optimize system design.

After completing the workshop, the participant will understand the basic concepts of the Power Architecture and all major functional blocks of the MPC560x devices.

Who Should Attend

Software and system engineers who need to come up to speed quickly on how to program and design with the MPC567x Devices.

Participants will be provided a hardcopy of the workshop course notes, lab book and textbook. A CDROM of all the lab experiments and demo version of the development tools is also provided.


Knowledge/experience of some microprocessor/microcontroller is necessary.

Detailed Agenda

Day 1

Road Map and Main Features

  • System Overview

  • Power Architecture Coreand Programming Model (Z0 Core)

  • Variable Length Encoding

  • System exceptions and interrupt handling

  • Interrupt Controller (INTC)

  • Context Switching (New Instructions)

  • Wake Up module(WKUP)

  • Crossbar Switch

  • Memory Protection Unit

Day 2

System Clock Generation and System Initialization

  • Frequency Modulated Phase Locked Loop module(FMPLL)

  • Pad (Pin) Assignment and Configuration

  • Boot-assist Module (Boot Sequence) Device Configuration

  • System Reset Sources and Reset Handling

  • Mode Entry(MC_ME)

  • Power Management and Low Power Modes

  • Voltage Regulator(VREG)

  • Real Time Clock (RTC)

  • Periodic Interrupt Timer module(PIT)

  • System Timer (STM)

  • Timed Input Output module(eMIOS200)

Day 3

Serial Interfaces

  • Deserialize-Serial Peripherals Interface controller module(DSPI)

  • Serial Communications-LINFlex Interface modules(SCI-LINFlex)

  • Controller Area Network controller modules(FlexCAN)

  • Inter IC Controller modules(I2C)

Analog System

  • Analog to Digital Converter modules (ADC)

  • Cross Triggering Unit(CTU)

System Memory

  • Error Correction Code(ECC)

  • SRAM organization

  • Flash organization and operation

  • Software Initialization Checklist after Power and Resets


  • Joint Test Action Group interface(JTAG)

  • Nexus Debug Interface module(NDI)

  • Calibration

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