MPC5675K (Komodo) Training
MPC5675K (Komodo) Training

ASH WARE – Embedded Software Tools since 1994

Course Title: MPC5675K (Komodo) Power Architecture

Target Applications: Automotive, Radar for Advanced Driver Assistance Systems, and aerospace.

Course Description: This 3 day course offers coverage of e200z7 Dual Power Core Architecture, Memory Management Unit, Memory Protection Unit (MPU), Instruction Cache, Crossbar switch and all Internal Buses, Redundancy Checker (CR), Fault Collection & Control Unit (FCCU), Clock Generation, Power Modes and Power Management Unit, System Timers such as PIT, eTimer and FlexPWM. It includes coverage of the Serial I/O Modules such as LINFlex, FlexCAN and DSP interfaces, Enhanced Direct Memory Controller (eDMA), Analogue to Digital Converter and Cross Trigger Unit (CTU). It also cover two cores running in a clock-accurate lock-step mode with emphasis on safety-critical features.

Who Should Attend: Software and system engineers who need to come up to speed quickly on how to program and design with the MPC5675K Devices.

Participants will be provided: A hard copy of the workshop course notes, lab book and textbook. A CDROM of all the lab experiments and demo version of the development tools is also provided.

Prerequisite: Knowledge/experience of some microprocessor/microcontroller is necessary.

After completing the workshop, the participant will understand the basic concepts of the Dual Core Power Architecture and all major functional blocks of the Komodo device.


Day 1

Komodo Dual Core

  • Main Features & Dual Core Basics
  • Power Architecture Core
    • Programming Model (Z7 Core)
    • Classic PowerPC Instruction Set
    • Signal Processing Engine 2
    • Variable-Length Encoding (VLE)
  • Core Exceptions and Handling
  • Interrupt Controller
    • Programmer’s Model
    • Context Switching (New Instructions)
    • Interrupts Handling
  • Memory Management Unit (MMU)
  • System Caches (Instruction Cache & Data)
  • Memory Protection Unit (MPU)

System Memory

  • SRAM
  • LC Flash Organization and operation
  • Erase and Program Sequence
  • Error Correction, Detection & Error Reporting

Day 2

System Clock Generation and Initialization

    • Internal Oscillator,
    • Phase Locked Loops (PLLs)
    • System Clock Generation
    • Clock Monitor Unit (CMU)
  • Pad (Pin) Assignment and Configuration
  • Boot-assist Module (Boot Sequence)
  • External Bus Interface (EBI)
  • DRAM Controller
  • System Reset Sources
    • Device Configuration
    • Reset Handling
  • Software Initialization Checklist after Power and system Resets
  • Two cores running in a clock-accurate lock-step mode
    • Concept
    • Description
    • Detection and Correction
  • System Timers
    • Periodic Interrupt Timers (PIT)
    • STM
    • SWT
  • Serial I/O
    • UART and LINFlex Bus
    • DSPI
    • FlexCAN2

Day 3


  • eTimer           
  • FlexPWM Timer
  • A/D Converter (ADC)
  • Cross Trigger Unit (CTU)
  • Enhanced DMA (eDMA2)
  • Flexray Overview
  • Functional Safety


  • Nexus Summary

Course Fees: $1500 per participant; Onsite training is to be negotiated with the customer