mpc567xf Training

ASH WARE – Embedded Software Tools since 1994

Course Title: Power Architecture (MPC567xF)

Target Applications: Automotive, commercial, industrial, and aerospace.

Course Description: This 3 day course offers coverage of e200z7 Power Architecture core including  instruction and data caches, Memory Management Unit (MMU), memory protection unit (MPU), cross-bar switch, system timers and all internal/external buses. It also includes details description, operation and programming of all on-chip peripherals with hands-on provided on most modules. Application examples are also discussed to provide participants good understanding of the MPC567xF Microcontroller family use cases.

Who Should Attend: Software and system engineers who need to come up to speed quickly on how to program and design with the MPC567x Devices.

Participants will be provided: A hard copy of the workshop course notes, lab book and textbook. A CDROM of all the lab experiments and demo version of the development tools is also provided.

Prerequisite: Knowledge/experience of some microprocessors/microcontrollers is necessary.

After completing the workshop, the participant will understand the basic concept of the Power Architecture and all major functional blocks of the MPC567xF (Mamba) device.

With hands-on provided and development tools, the participant will be able to program on-chip peripherals and be able to quickly optimize system design.


Day 1

  • MPC567xF Overview
  • Main Features and Road Map
  • Compatibility and Scalability
  • Power Architecture Coreand Programming Model (e200z7 Core)
  • Classic PowerPC Instruction Set
  • Signal Processing Engine
  • Power Architecture Exceptions
  • Interrupt Controller and Interrupt Handling
  • Context Switching (New Instructions)
  • Memory Management Unit (MMU)
  • System Caches (Instruction and Data)
  • Memory Protection Unit (MPU)

Day 2

System Clock Generation and Initialization

  • PLL and System Clock Generation
  • Pad (Pin) Assignment and Configuration
  • Boot-assist Module (Boot Sequence) Device Configuration
  • System Reset Sources and Reset Handling

Power management

  • Power Modes
  • New Instructions
  • Software Watchdog Timer  (SWT)
  • System Timers (STM)
  • Periodic Interrupt Timers (PIT)
  • Software Initialization Checklist after Power-on and Resets
  • Enhanced DMA (eDMA2)
  • Enhanced Modular I/O System (eMIOS200)

Day 3


  • Enhanced Timer Processor Unit (eTPU2)
  • Detailed Overview
  • Programming Model
  • Timing Tasks and Scheduler
  • Angle Clock use-case Application Example
  • eTPU Code Demo using ASH WARE Simulator
  • Enhanced Queued A/D Converter (eQADC)
  • Decimation Filter
  • Enhanced Serial Communication Interface (eSCI) and LIN Bus
  • DSPI
  • FlexCAN2
  • FlexRay

System Memory

  • Error Correction Code
  • SRAM
  • Flash memory controller
  • Erase and programming procedure


  • Nexus Summary
  • Calibration